1. Field of the Invention
The invention relates, in general, to the field of radio frequency identification (RFID) tags and systems. More particularly, the invention relates to numerous circuit improvements for the RFID tag for optimizing performance.
2. Discussion of the Related Art
As is well known in the art, a basic RFID system includes three components: an antenna or coil; a transceiver with decoder, i.e., RFID reader; and a transponder, i.e., RFID tag, programmed with unique information.
RFID tags are categorized as either active or passive. Active RFID tags are powered by an internal battery and are typically read/write, i.e., tag data can be rewritten and/or modified. Passive RFID tags operate without a separate external power source and obtain operating power generated from the reader.
An example of a typical passive RFID tag is shown in FIG. 1. Tag 100 includes an antenna 102 that is coupled to an analog front end circuit 104, which is in communication with a digital and memory circuit 106 through receive (RX) and transmit (TX) paths. Most passive RFID tags today use some sort of electrically erasable programmable read-only memory (EEPROM) such as flash memory.
While EEPROM memory has served in passive RFID tag applications to date, the demands for greater data throughput into and out of the RFID are increasing. This can be seen for example in factory environments, and in collecting highway tolls. The EEPROM based passive RFID tags, are slow and may not be suited for the higher throughput applications. Alternative, faster memories technologies such as FRAM (“Ferroelectric Random Access Memory”) memory exist that are ideally suited for these new higher speed RFID applications. However, the RFID environment is extremely challenging for FRAM based integrated circuits, not only for the normal challenges such as the variation in process corners, temperature, and the constraints of low power operation but also for intermittent contact with the RFID reader leading to interruptions with the available power supply on the RFID tag.
What is desired, therefore, are circuit improvements for an RFID tag that will provide robust operation in a challenging RFID environment while exploiting the advantages of FRAM memory.